In a semiconductor process, multiple dies (e.g., image sensor chips) are typically fabricated on a round semiconductor wafer. Scribe lines are provided between two adjacent dies, such that the semiconductor wafer can be cut into individual dies by dicing along those scribe lines.
Unfortunately, the dicing process, using such as a die saw, may damage the physical structure of the die due to lateral stress induced from the dicing process. For example, micro cracks may be produced at edge portions of the die during the dicing process, which may propagate unpredictably into the integrated circuit of the die and destroy it. Such micro cracks are also conduits for the introduction of destructive contaminants, which results in low reliability of the die. In addition, partial or complete delamination of the die may occur in the dicing process, resulting in low production yield. Damages as described above would render the dies unusable and ruin the commercial value of the dies. Therefore, there is a need for an improved structure of the semiconductor wafer to protect the die from damage during the dicing process.